Intel® Arria® 10 GX Multi-rate SDI II Pass-through Implementation Using VIP Pipeline Design

The objective of this video is to showcase the multirate (up to 12G-SDI) pass-through video data with external voltage-controlled crystal oscillator (VCXO). The key components of design are SDI II Intel® FPGA IP, Clocked Video Input II (4k ready) Intel® FPGA IP, Clocked Video Output II (4k ready) Intel® FPGA IP, Frame Buffer II (4k ready) Intel® FPGA IP, and Switch II (4k ready) Intel® FPGA IP. For technical questions, contact the Intel Community: https://forums.intel.com/s/?language=... Need more help on Intel FPGAs? Visit the Intel FPGA Forum: https://forums.intel.com

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