Toshiba Expands Line-up of e ∙MMC™ Version 5.1 Compliant Embedded NAND Flash Memory Products chip one stop

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Toshiba Expands Line-up of e ∙MMC™ Version 5.1 Compliant Embedded NAND Flash Memory Products

2015/03/25Toshiba Processor/Memory

Supports "command queuing" and "secure write protection" features

March 24, 2015

TOKYO—Toshiba Corporation’s (TOKYO: 6502) Semiconductor & Storage Products Company today announced the launch of JEDEC e∙MMC™ Version 5.1[1] compliant embedded NAND flash memory products supporting “command queuing” and "secure write protection". The new products integrate NAND chips fabricated with 15nm process technology and are designed for application in a wide range of digital consumer products, including smartphones, tablets and wearable devices. Sample shipment of the 16GB and 64GB products start today, with 32GB and 128GB products to follow.

The new products integrate NAND chips fabricated with Toshiba's cutting-edge 15nm generation process technology with a controller to manage basic control functions for NAND applications in a single package. In October 2014, Toshiba launched the industry’s first[2] e∙MMC™ products supporting all mandatory features of JEDEC e∙MMC™ Version 5.1, which was officially issued by JEDEC on February 24, 2015. The new additions to the line-up support two optional features of e∙MMC™ Version 5.1, “command queuing” and “secure write protection”.

The "command queuing feature" allows users to process multiple tasks generated by the user’s issue of multiple commands, in the order of the user’s preference, by initially storing the tasks in a waiting queue. It improves random read performance speed by approximately 30% at maximum[3] compared to Toshiba existing products without the “command queuing feature”. It effectively improves the user experience when simultaneously executing multiple applications on mobile devices, including smartphones and tablets.

The "secure write protection feature" expands the conventional write protect feature and protects the user’s important data stored in an assigned area from being overwritten or erased by unauthenticated users.

Demand continues to grow for NAND flash memory that can support applications such as smartphones and tablets. This includes embedded memories with a controller, which minimize development requirements and ease integration into system designs. Toshiba is meeting this demand by reinforcing its line-up of high performance and high density memory products and will continue to take leadership in the market.

Line-up of the New Products

*In Toshiba e∙MMC™ categories, "Supreme" represents products suited to high-end class applications and "Premium" represents products for middle- and low-end class applications.

Key Features

1.The JEDEC e∙MMC™ Version 5.1 compliant interface handles essential functions, including writing block management, error correction and driver software. It simplifies system development, allowing manufacturers to minimize development costs and speed up time to market for new and upgraded products. Additionally, new features[4] standardized in JEDEC e∙MMC™ Version 5.1, such as BKOPS control, Cache Barrier, Cache Flushing Report and Large RPMB Write, are applied to the new products to enhance usability.

2.The random read performance can be improved by approximately 30% (max.)[3] by applying the "command queuing feature", one of the new optional features of JEDEC e∙MMC™ Version 5.1.

3.Embedded in a system, the 128GB products can record up to 16.3 hours of full spec high definition video and 39.7 hours of standard definition video[5].

Key Specifications

[1] e∙MMC™ is a product category for a class of embedded memory products built to the JEDEC e∙MMC™ Standard specification and is a trademark of the JEDEC Solid State Technology Association. The latest JEDEC e･MMC™Version 5.1 specification was officially issued by JEDEC on February 24, 2015.

[2] As of October 2, 2014. Toshiba survey.

[3] Toshiba survey.

[4] "BKOPS (Background operations) control" is a function where the host allows the device to perform background operation when the device is idle. "Cache Barrier" is a function that controls when cache data is written to the memory chip. "Cache Flushing Report" is a function that informs the host if the device’s flushing policy is FIFO (First In First Out) or not. "Large RPMB write" is a function that enhances the data size that can be written to the RPMB area to 8KB.

[5] HD and SD are calculated at average bit rates of 17Mbps and 7Mbps, respectively.

*The products are labeled based on the memory chip(s) it contains, not the amount of memory capacity available for data storage by the end user. Part of the capacity is reserved for card functionality. Please refer to the data sheet or your local Toshiba sales representative.
(For purposes of measuring memory capacity in this context, 1GB = 1,073,741,824 bytes.)

*Read and write speeds are calculated as 1MB/s = 1,000,000bytes/s.

Information in this document, including product prices and specifications, content of services and contact information, is current on the date of the announcement but is subject to change without prior notice.

Toshiba Corporation- Semiconductor and Storage Products Company　Website＞http://toshiba.semicon-storage.com/ap-en?mm=cp150324&no=06

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